Founder's IEEE Signal Processing Letters Best Paper Award · 2025

Redefining AI Efficiency Through Structured Quantum Intelligence

We build tensor-native AI infrastructure that compresses models by over 50× with near-zero accuracy loss — deployable across GPU, CPU, and QPU.

In collaboration with

IBM
NVIDIA
Quantinuum
Georgia Tech
KAUST
U. Washington
Xanadu
Microsoft Research
Hon Hai (Foxconn)
IBM
NVIDIA
Quantinuum
Georgia Tech
KAUST
U. Washington
Xanadu
Microsoft Research
Hon Hai (Foxconn)

For AI infrastructure teams

Build Models, Not Just Train Them

Structure-aware tensor decomposition generates compressed models natively — no post-hoc pruning, no accuracy tradeoff.

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For edge deployment

Powerful AI on Constrained Hardware

Deploy production-grade models on CPUs and edge devices with up to 90% reduction in compute and memory.

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For enterprise & finance

Deterministic AI for Mission-Critical

Zero logical capability loss. Tensor-native compression delivers guaranteed accuracy for high-stakes financial and enterprise systems.

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For quantum-ready teams

Native Quantum Advantage, Today

TensorDual-VQC bridges GPU and QPU workloads, resolves barren plateaus, and runs on real NISQ hardware including the 156-qubit IBM Heron.

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Core Technology

Structure-Aware Model Generation

Unlike pruning or distillation — which are forms of lossy compression — TensorHyper generates AI models natively through tensor decomposition. The result: extreme compression ratios with near-zero accuracy loss, deployable across GPU, CPU, and QPU.

>50×

Parameter Compression

Up to

90%

Compute & Memory Reduction

~100%

Accuracy Retention

Acceleration

10×

Combinatorial Search & Sampling

Validated experiment: 11.69M → 4,035 parameters (~2,900× reduction) on a structure-aware compressed model.

Coming Soon

GPU · CPU · QPU on a single tensor representation

Heterogeneous Computing

QuStruct AI Platform

A unified infrastructure for running AI workloads across GPU, CPU, and QPU. Manage tensor model deployment, monitor compression benchmarks, and seamlessly transition from classical to quantum-native compute — all from one control plane.

Proven Performance

Our tensor-native models have been validated against state-of-the-art benchmarks.

~2,900×

Parameter Reduction

11.69M → 4,035 parameters in a structure-aware compressed model

~100%

Accuracy Retention

Compressed model matches — and in some runs exceeds — the uncompressed baseline

Stable

Deep VQC Training

Residual optimization keeps gradient variance from collapsing — no barren plateau

156-qb

IBM Heron Validation

TensorDual-VQC runs on real superconducting hardware, not just simulators

Sources: structure-aware compression experiment (BP §2.4) and 156-qubit IBM Heron validation (BP §2.6 / §5).

Explore Our AI Models

Structure-aware tensor decomposition

TensorHyper

GPU-native tensor network infrastructure. Validated at ~2,900× parameter reduction with zero logical capability loss — the highest compression-accuracy ratio measured in the industry.

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Unified GPU + QPU runtime · Resolves barren plateau

TensorDual-VQC

Quantum-native variant bridging GPU and QPU. Resolves barren plateaus, enables stable deep-circuit training, and runs on real quantum hardware including the 156-qubit IBM Heron — delivering the first scalable quantum advantage.

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Milestones

From theory to scalable quantum AI.

See full timeline
  1. 2020–2023

    Theoretical Foundation

    Establishing the theoretical upper bound, error analysis, and fundamental theory for tensor-structured AI.

  2. 2024

    Distributed & Natural Gradient

    Pioneering distributed collaboration and natural-gradient methods that extend tensor networks to deeper, larger models.

  3. 2025

    IEEE SPL Best Paper Award

    Founder Dr. Jun Qi receives the IEEE Signal Processing Letters Best Paper Award for advances in tensor-structured parameterization.

  4. 2025

    TensorHyper Validated on IBM Heron

    Structure-aware compression achieves ~2,900× parameter reduction with near-zero accuracy loss, validated on the 156-qubit IBM Heron processor.

  5. 2026

    QuStruct.AI Founded in Singapore

    QuStruct.AI is incorporated in Singapore to commercialize tensor-native AI infrastructure for the Quantum-AI era.

  6. 2026

    Joint R&D with IBM, NVIDIA & Quantinuum

    Collaborative R&D programs with leading quantum and AI hardware providers, including NVIDIA via the CUDA-Q stack.

Designed for efficiency-driven verticals.

Finance & BankingDefense & AerospaceHealthcare & Life SciencesEnergy & UtilitiesManufacturingAutonomous SystemsTelecommunicationsCybersecurityResearch & AcademiaEdge Computing

Tensor-native compression is built for industries where efficiency, accuracy, and determinism are non-negotiable.

Three Walls Blocking AI's Next Leap

Scaling Wall

As high-quality internet data becomes scarce, simply scaling compute and model size to drive performance improvements is hitting a bottleneck.

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Economic Wall

The operating costs of top-tier models remain prohibitively high, leaving the per-interaction cost of AI services significantly higher than traditional search.

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Trust Wall

The inherent nature of probabilistic prediction means AI cannot guarantee 100% accuracy, limiting its deep application in high-value fields.

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The First Scalable Quantum Advantage

TensorDual-VQC

Bridge GPU and QPU Workloads

TensorDual-VQC resolves barren plateaus, eliminates exponential parameter scaling, and enables stable training in deep quantum circuits. Validated on the 156-qubit IBM Heron processor — running today on NISQ devices, without waiting for fault-tolerant hardware.

Our Company

Founded in Singapore in 2026 to build the computational infrastructure for the Quantum-AI era.

We recognized that the future of AI lies not in scaling models, but in structuring them. Our team and partners come from Georgia Tech, KAUST, U. Washington, Xanadu, Microsoft Research, and Hon Hai Research Institute — combining deep expertise in quantum information, tensor computing, large-scale signal processing, and institutional finance.

Meet the team

Dr. Jun Qi

Founder

Tsinghua University → University of Washington → Georgia Tech. Pioneer of tensor-structured parameterization for scalable AI and quantum systems. Recipient of the IEEE Signal Processing Letters Best Paper Award (2025). Published in npj Quantum Information and IEEE Transactions.

Partners & Ecosystem

We conduct joint research and development with IBM, NVIDIA (via CUDA-Q), and Quantinuum, and collaborate with world-class institutions including Georgia Tech, KAUST, the University of Washington, Xanadu (Nasdaq: XNDU), Microsoft Research, and the Hon Hai Research Institute.

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